/*
 * Shared LARK WiFi Header
 *
 * RX/TX meta descriptor format
 *
 * Copyright 2014, CJTian <cjtian@actions-semi.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; see the file COPYING.  If not, see
 * http://www.gnu.org/licenses/.
 *
 * This file incorporates work covered by the following copyright and
 * permission notice:
 *    Copyright (c) 2004-2014 Actions Semi Conductor.
 *
 *    Permission to use, copy, modify, and/or distribute this software for any
 *    purpose with or without fee is hereby granted, provided that the above
 *    copyright notice and this permission notice appear in all copies.
 *
 *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef __LARK_SHARED_WLAN_H
#define __LARK_SHARED_WLAN_H

#include "fwcmd.h"

/*****************************************************************************/
/* Protocol Accelerator Register Initialization Values                       */
/*****************************************************************************/

/*****************************************************************************/
/* General Registers                                                         */
/*****************************************************************************/

#define MAC_PA_DMA_BURST_SIZE_INIT_VALUE   0x00000004
#define MAC_HW_ID_INIT_VALUE               0x4E4D4143 /* ASCII NMAC */

/*****************************************************************************/
/* Reception Registers                                                       */
/*****************************************************************************/
#ifdef NON_FC_MACHW_SUPPORT
/* 7          6            5          4        3       2       1       0     */
/* NonDir     QCF_POLL     CF_END     ATIM     BCN     RTS     CTS     ACK   */
/* 31-14     13          12              11      10        9       8         */
/* Reserved  ExpectedBA  UnexpectedBA    Deauth  FCSFail   Dup     OtherBSS  */
#ifdef BSS_ACCESS_POINT_MODE
#define MAC_RX_FRAME_FILTER_INIT_VALUE  0x000036FF
#else /* BSS_ACCESS_POINT_MODE */
#define MAC_RX_FRAME_FILTER_INIT_VALUE  0x00003EFF
#endif /* BSS_ACCESS_POINT_MODE */
#else /* NON_FC_MACHW_SUPPORT */

/* 7          6            5          4        3       2       1       0     */
/* NonDirMgmt QCF_POLL     CF_END     ATIM     BCN     RTS     CTS     ACK   */
/* 14       13          12              11      10       9    8              */
/* SecChan  ExpectedBA  UnexpectedBA    Deauth  FCSFail  Dup  BcMcMgmtOBSS   */
/*        31-19     18                17          16          15             */
/*        Reserved  DiscardedIBSSBcn  NonDirCtrl  NonDirData  BcstDataOBSS   */


#ifdef BSS_ACCESS_POINT_MODE
#define MAC_RX_FRAME_FILTER_INIT_VALUE  0x0003F6FF
#else /* BSS_ACCESS_POINT_MODE */
#define MAC_RX_FRAME_FILTER_INIT_VALUE  0x0003FEFF
#endif /* BSS_ACCESS_POINT_MODE */

#endif /* NON_FC_MACHW_SUPPORT */

#define MAC_RX_FRAME_FILTER_ALL_VALUE   0xFFFFFFFF
#define MAC_FRAME_CON_INIT_VALUE        0x00000000

/* 31 - 5     4     3           2          1       0                         */
/* Reserved  ATIM   Probe Rsp   Probe Req  Beacon  HighPriorityQEnable       */
#define MAC_HIP_RXQ_CON_INIT_VALUE  0x0000000F

/*****************************************************************************/
/* Interrupt Registers                                                       */
/*****************************************************************************/

/* 9           8     7      6     5      4    3         2    1       0       */
/* RFVCOUnlock CFEnd CAPEnd Error WakeUp ATIM HCCA TXOP TBTT TX Comp RX Comp */
/* 31 - 16   15     14      13     12           11             10            */
/* Reserved Deauth PATxSus RadDet HwTxAbReqEnd HwTxAbReqStart HIPQRxComp     */
#ifdef BSS_ACCESS_POINT_MODE
#define MAC_INT_MASK_INIT_VALUE 0x00007FFF
#else /* BSS_ACCESS_POINT_MODE */
#define MAC_INT_MASK_INIT_VALUE 0x0000FFFF
#endif /* BSS_ACCESS_POINT_MODE */

#define MAC_ERROR_MASK_INIT_VALUE  0x00000000

/*****************************************************************************/
/* PHY Interface and Parameters Register                                     */
/*****************************************************************************/

#define MAC_PHY_RF_REG_BASE_ADDR_INIT_VALUE  0x00000000
#define MAC_PHY_TIMEOUT_ADJUST_INIT_VALUE    0x0000001F
#define MAC_PHY_SERVICE_FIELD_INIT_VALUE     0x00000000
#define MAC_RX_WATCHDOG_TIMER_INIT_VALUE     0x0000001E
#define MAC_RXSTART_DELAY_REG_INIT_VALUE     0x221B6FCF //0x22196FCF - Changed since ACK reception at Non-HT rates was failing

/*****************************************************************************/
/* Channel Access Timer Management Registers                                 */
/*****************************************************************************/

#define MAC_SIFS_TIME_INIT_VALUE             0x0000100A
#define MAC_SIFS_TIME2_INIT_VALUE            0x0000A064
#define MAC_RIFS_TIME_CONTROL_REG_INIT_VALUE 0x00000050

#define MAC_SEC_CHAN_SLOT_COUNT_INIT_VAL_FREQ_5     0x00000031
#define MAC_SEC_CHAN_SLOT_COUNT_INIT_VAL_FREQ_2     0x00000032

/*****************************************************************************/
/* Power Management Registers                                                */
/*****************************************************************************/

#define MAC_OFFSET_INTERVAL_INIT_VALUE      0x00000020



#endif /* __LARK_SHARED_WLAN_H */
